骑猪撞大树
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This paper introduces the design methods of LCD drive system which is based on the MicroBlaze IP core of FPGA.
First of all, the paper gives a whole introduction on PLD and FPGA. Then the hardware development platform--Spartan3E Development Board is introduced. Next is the Xilinx Company’s MicroBlaze soft core. It analyzes the structure, principles and design methods of 32 microprocessor IP core MicroBlaze; and discusses C language programming and debugging of MicroBlaze in EDK.
The paper also analyzes the serial communication, RS-232 agreement and the working principle of on-board LCD1602 and LCD6916 panels. It also gives a detailed explanation on how to use the existing IP core for MicroBlaze. It realizes integrated application of the use of UART IP core, timer IP core, GPIO IP core and researches all interrupted preparation of the IP core. It achieves the driving of LCD6916 using GPIO IP core; thereby real-time clock LCD6916 displays, generated by a timer interruption seconds.
It researches the adding and using methods of IP core that does not provide by EDK. It studies the driving method of using of LCD IP core on the third-party to drive LCD6916.
Through serial ports, you can use the PC to control the clock, achieve the overall changes, revise the minute and second’s position on the clock and display the revised information on LCD1602 of the development board. Thus it completes the design of MicroBlaze’s LCD driver system based on the FPGA.
First of all, the paper gives a whole introduction on PLD and FPGA. Then the hardware development platform--Spartan3E Development Board is introduced. Next is the Xilinx Company’s MicroBlaze soft core. It analyzes the structure, principles and design methods of 32 microprocessor IP core MicroBlaze; and discusses C language programming and debugging of MicroBlaze in EDK.
The paper also analyzes the serial communication, RS-232 agreement and the working principle of on-board LCD1602 and LCD6916 panels. It also gives a detailed explanation on how to use the existing IP core for MicroBlaze. It realizes integrated application of the use of UART IP core, timer IP core, GPIO IP core and researches all interrupted preparation of the IP core. It achieves the driving of LCD6916 using GPIO IP core; thereby real-time clock LCD6916 displays, generated by a timer interruption seconds.
It researches the adding and using methods of IP core that does not provide by EDK. It studies the driving method of using of LCD IP core on the third-party to drive LCD6916.
Through serial ports, you can use the PC to control the clock, achieve the overall changes, revise the minute and second’s position on the clock and display the revised information on LCD1602 of the development board. Thus it completes the design of MicroBlaze’s LCD driver system based on the FPGA.
